Standard Machines is a research lab building high-performance tools and AI for chip design.
Advancement in AI rests on chips. It takes years and hundreds of experts to carry a chip from architecture to tape-out — so the ideas in AI that win are the ones that map to the hardware that already exists.
Chip design moves at the speed of its inner loop: propose, simulate, learn, refine. Today each turn takes hours or days. We are rebuilding the tools for modern compute — orders of magnitude faster.
Fast, faithful feedback is how anything learns — engineers and machines
alike.
A tool fast enough for a designer to explore a thousand ideas is
fast enough for AI to learn to design chips. We are closing that loop, machines that design machines.
The Chip Design Flow
What we build
Sim
An accelerated simulator for SystemVerilog, designed to scale with
massive compute. The same designs, the same testbenches, an order of
magnitude faster than traditional tools.
The feedback machine
for AI to design chips.
Harness
Harness hands the loop to a machine: propose a change, simulate it, read the waves, refine. The simulator, waveform viewer, and coverage, wrapped into tools an AI can drive until verification closes.
Evals
Evaluations for frontier chip design — real designs, real testbenches, graded against ground truth. If machines are to design chips, the first instrument to build is the one that measures whether they can.